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INTEGRATED CIRCUITS
74F595 8-bit shift register with output laches (3-State)
Product specification IC15 Data Handbook 1990 Apr 18
Philips Semiconductors
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
FEATURES
* Low noise, now switching feedthrough current * Controlled output edge rates * High impedance PNP base inputs for reduced loading
(20A in High and Low states)
PIN CONFIGURATION
Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Q0 DS OE STCP SHCP SHR QS
* 8-bit serial-in, parallel-out shift register with storage * 3-state outputs * Shift register has direct clear * Guaranteed shift frequency-DC to 100MHz
DESCRIPTION
The 74F595 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-State outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct overriding clear, serial input and serial output pins for cascading. Both the shift register and storage register clocks are positive edge-triggered. If the user wishes to connect both clocks together, the shift register state will always be one clock pulse ahead of the storage register. This device uses patented circuitry to control system noise and internal ground bounce. This is done by eliminating switching feedthrough current and controlling both Low-to-High and High-to-Low slew rates. TYPE 74F595
SF01096
TYPICAL fMAX 130MHz
TYPICAL SUPPLY CURRENT (TOTAL) 65mA
ORDERING INFORMATION
DESCRIPTION 16-pin plastic DIP 16-pin plastic SO COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C N74F595N N74F595D PKG DWG # SOT38-4 SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS Ds SHCP STCP SHR OE Qs Q0-Q7 Serial data input Shift register clock pulse input (active rising edge) Storage register clock pulse input (active rising edge) Shift register reset input (active Low) Output Enable input (active Low) Serial expansion output Data outputs DESCRIPTION 74F (U.L.) HIGH/LOW 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 50/33 150/40 LOAD VALUE HIGH/LOW 20A/20A 20A/20A 20A/20A 20A/20A 20A/20A 1.0mA/20mA 3.0mA/24mA
NOTE: One (1.0) FAST unit load is defined as: 20A in the High state and 0.6mA in the Low state.
1990 Apr 18
2
853-1096 99392
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
LOGIC SYMBOL
14
IEC/IEEE SYMBOL (IEEE/IEC)
13 12 EN3 C2 SRG8 Ds 10 11 Qs 14 R C1/ ! 1D 2D 3 15 1
13 12 11 10
OE STCP SHCP SHR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 9
2 3
15
1
2
3
4
5
6
7
4 5
VCC = Pin 16 GND = Pin 8
6
SF01097
2D 3
7 9
SF01098
MODE SELECT - FUNCTION TABLE
INPUTS OE H H L H L H L H L SHR H L L H H H H H H SHCP X X STCP Dn X X X ds ds X X ds ds INTERNAL SHIFT REGISTERS O0 O0 L0 L0 Ds Ds O0 O0 Ds Ds O1-O7 O1-O7 L L o0-o6 o0-o6 O1-O7 O1-O7 o0-o6 o0-o6 INTERNAL STORAGE REGISTER Q0-Q7 Q0-Q7 Q0-Q7 Q0-Q7 Q0-Q7 Q0-Q7 o0-o7 o0-o7 o0-o7* o0-o7* OUTPUTS Q0-Q7 Z Z Q0-Q7 Z Q0-Q7 Z o0-o7 Z o0-o* QS Q7 L L o6 Shift o6 Q7 Store Q7 o6 Store, Store then Shift o6 OPERATING MODES No Change Clear shift register, hold latch
H = High voltage level L = Low voltage level X = Don't care Z = High impedance dn (on)=Lower case letters indicate the state of the referenced input (or output) one setup time prior to the Low-to-High clock transition = Low-to-High clock transition = Not a Low-to-High clock transition * = When clocking both SHCP and STCP simultaneously the Shift Register state will always be one clock pulse ahead of the Storage Register
1990 Apr 18
3
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
LOGIC DIAGRAM
13 12 11 10 14 D CP CLR Q Q R CP S Q 15 Q0
OE STCP SHCP SHR Ds
S R CP CLR
Q Q
R CP S
Q
1
Q1
S R CP CLR
Q Q
R CP S
Q
2
Q2
S R CP CLR
Q Q
R CP S
Q
3
Q3
S R CP CLR
Q Q
R CP S
Q
4
Q4
S R CP CLR
Q Q
R CP S
Q
5
Q5
S R CP CLR
Q Q
R CP S
Q
6
Q6
S R CP CLR
Q Q
R CP S
Q
7
Q7
9
Qs
VCC = Pin 16 GND = Pin 8
SF01099
1990 Apr 18
4
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IO OUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Qs Current applied to output in Low output state Q0-Q7 Operating free-air temperature range Storage temperature range 48 0 to +70 -65 to +150 mA C C PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to +VCC 40 UNIT V V mA V mA
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL VCC VIH VIL IIK IO OH Supply voltage High-level input voltage Low-level input voltage Input clamp current Qs High-level High level output current Q0-Q7 Qs IO OL Tamb Low-level Low level output current Q0-Q7 Operating free-air temperature range 0 24 70 mA C -3 20 mA mA PARAMETER MIN 4.5 2.0 0.8 -18 -1 NOM 5.0 MAX 5.5 V V V mA mA UNIT
1990 Apr 18
5
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL PARAMETER TEST CONDITIONSNO TAG 10%VCC 5%VCC 10%VCC 5%VCC 10%VCC 5%VCC 10%VCC 5%VCC MIN 2.5 2.7 2.4 2.7 3.3 0.30 0.30 0.35 0.35 -0.73 0.50 0.50 0.50 0.50 -1.2 100 20 -20 50 -50 -60 55 VCC = MAX 70 65 -150 80 100 95 3.4 TYP
NO TAG
MAX
UNIT V V V V V V V V V A A mA A A mA mA mA mA
Qs VO OH High level output voltage High-level Q0-Q7 Q0 Q7
VCC = MIN, VIL = MAX MAX, VIH=MIN
IO = 1mA OH=-1mA
IO =-3mA OH = 3mA
Qs VO OL Low-level Low level output voltage Q0-Q7 Q0 Q7 VIK II IIH IIL IOZH IOZL IOS Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Off-state output current, High level of voltage applied Off-state output current, Low level of voltage applied Q0-Q7 only Q0-Q7 only
VCC = MIN, VIL = MAX MAX, VIH = MIN,
IO = 20mA OL
IO = 24mA OL
VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX, VO = 2.7V VCC = MAX, VO = 0.5V VCC = MAX ICCH
Short-circuit output currentNO TAG
ICC
Supply current (total)
ICCL ICCZ
NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.
1990 Apr 18
6
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
AC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITION VCC = +5V Tamb = +25C CL = 50pF, RL = 500 MIN fMAX tPLH tPHL tPLH tPHL tPHL tPZH tPZL tPHZ tPLZ Maximum clock frequency-SHCP to Qs Propagation delay SHCP to Qs Propagation delay STCP to Q0-Q7 Propagation delay SHR to Qs Output Enable time OE to Q0-Q7 Output Disable time OE to Q0-Q7 Waveform NO TAG Waveform NO TAG Waveform NO TAG Waveform NO TAG Waveform 5 Waveform 6 Waveform 5 Waveform 6 115 6.0 2.5 5.5 3.0 3.5 3.5 3.0 2.0 4.0 TYP 135 8.0 4.5 8.0 5.0 5.5 5.5 5.5 4.0 6.0 10.5 7.5 10.0 8.0 8.0 9.0 8.5 7.0 9.0 MAX VCC = +5V 10% Tamb = 0C to +70C CL = 50pF, RL = 500 MIN 90 5.0 2.5 4.5 3.0 3.0 2.5 2.5 1.5 3.0 12.5 7.5 13.0 8.5 8.5 10.5 10.5 8.5 10.5 MAX MHz ns ns ns ns ns UNIT
AC SETUP REQUIREMENTS
LIMITS SYMBOL PARAMETER TEST CONDITION VCC = +5V Tamb = +25C CL = 50pF, RL = 500 MIN ts(H) ts(L) th(H) th(L) ts(L) ts(H) tW(H) tW(L) tW(H) tW(L) tW(L) tREC Setup time, High or Low Ds to SHCP Hold time, High or Low Ds to SHCP Setup time, Low SHR to STCP Setup time, High SHCP to STCP SHCP Pulse width, High or Low STCP Pulse width, High or Low SHR Pulse width, Low Recovery time, SHR to SHCP Waveform 3 Waveform 3 Waveform 3 Waveform 4 Waveform NO TAG Waveform NO TAG Waveform NO TAG Waveform NO TAG 2.0 2.0 0 0 4.5 4.5 3.5 4.0 4.0 3.0 3.0 3.0 TYP MAX VCC = +5V 10% Tamb = 0C to +70C CL = 50pF, RL = 500 MIN 2.5 2.5 0 0 5.0 5.0 4.0 4.0 4.0 3.5 3.0 3.0 MAX ns ns ns ns ns ns ns ns UNIT
AC WAVEFORMS
For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.
1990 Apr 18
7
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
1/fMAX SHR SHCP, STCP VM tw(H) tPHL tw(L) SHCP tPLH tPHL QS, Q0-Q7 VM VM Qs VM VM VM VM tw(L) VM tREC
SF01100
SF01101
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Widths, and Maximum Clock Frequency
Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay, and Master Reset to Clock Recovery Time
Ds
VM ts(H)
VM th(H)=0
VM ts(L)
VM th(L)=0
SHR SHCP
VM ts(H)
VM ts(L)
SHCP
VM
VM
STCP
VM
VM
SF01102
SF01103
Waveform 3. Data Setup and Hold Times
Waveform 4. Setup and Hold Times
1990 Apr 18
8
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
AC WAVEFORMS (Continued)
For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.
OE
VM tPZH
VM tPHZ VM 0V VOH -0.3V
OE
VM tPZL
VM tPLZ VM
Q0-Q7
Q0-Q7
VOL +0.3V
SF01104
SF01105
Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level
Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORMS
VCC 7.0V VIN PULSE GENERATOR RT D.U.T. VOUT RL NEGATIVE PULSE 90% VM 10% tTHL (tf ) CL RL tTLH (tr ) 90% POSITIVE PULSE 10% tTHL (tf ) AMP (V) 90% VM tw 10% 0V tw VM 10% tTLH (tr ) 0V AMP (V)
90%
Test Circuit for 3-State Outputs SWITCH POSITION TEST tPLZ tPZL All other SWITCH closed closed open
VM
Input Pulse Definition
DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00777
1990 Apr 18
9
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
1990 Apr 18
10
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
1990 Apr 18
11
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
NOTES
1990 Apr 18
12
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 10-98 9397-750-05143
Philips Semiconductors
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